A Survey on ADPLL Components and their effects upon Power, Frequency and Resolution
نویسنده
چکیده
The All Digital Phase Locked Loop consists of full digital components which are used in advanced communication systems like frequency synthesizer, Carrier and clock recovery, modulator/demodulator etc. Hence the performance analysis of ADPLL becomes very necessary when designing these equipments. The ADPLL contains phase detector, loop filter and Digital controlled oscillator. The performance of ADPLL depends on various factors like combination of different components, power consumption, frequency resolution, jitter performance, locking speed etc. At present, the different combinations of components ADPLL are used to achieve fine resolution and fast lock-in time and it is appropriate for system-on chip applications. In this paper the effects of various combinations of the internal components on the important parameters of ADPLL like frequency range, power, and algorithms used have been compared.
منابع مشابه
Time-to-Digital Converter (TDC) for WiMAX ADPLL in State-of-The-Art 40-nm CMOS
WiMAX (Worldwide Interoperability for Microwave Access) is the emerging wireless technology standard of the near future, which enables high speed packet data access. To anticipate the future demands on WiMAX technology, we proposed an ADPLL (all-digital phase locked loop) solution for the WiMAX system. The developed ADPLL system has targeted frequencies from 2.3 GHz to 2.7 GHz and from 3.3 GHz ...
متن کاملA 1.5GHz 0.2psRMS jitter 1.5mW divider-less FBAR ADPLL in 65nm CMOS
This paper presents a low power, low jitter, PVTstable film-bulk acoustic wave resonator (FBAR) based all digital phase-locked loop (ADPLL) in a 65nm CMOS process. We introduce a power-efficient integer-N ADPLL architecture, where the digitally-controlled FBAR oscillator (FBAR DCO) achieves phase-lock to a reference clock without any explicit frequency dividers in the feedback path. The simplif...
متن کاملAll-Digital Phase Locked Loop (ADPLL) -A Review
--The All-Digital Phase-Locked Loop (ADPLL) is digital electronic circuit that are used in modern electronic communication systems like frequency synthesizer, modulator/demodulator etc. This paper presents a review of various ADPLL techniques. The range of input frequency of ADPLL is 40 to 98 MHz; the output frequency may be up to 2.92 to 4 GHz range. The components of ADPLL such as phase detec...
متن کاملA Frequency Synthesis of All Digital Phase Locked Loop
All Digital Phase locked loops (ADPLL) plays a major role in System on Chips (SoC). Many EDA tools are used to design such complicated ADPLLs. It operates on two modes such as frequency acquisition mode and phase acquisition mode. Frequency acquisition mode is faster compared to Phase acquisition, hence frequency synthesis is performed. The CMOS technology is used to design such a complex desig...
متن کاملA 1.56GHz wide-tuning all digital FBAR-based PLL in 0.13µm CMOS
This paper presents the design rationale and measured results of a low power, low jitter, PVT-stable FBAR-based RF synthesizer implemented in 0.13μm CMOS. A digitally controlled FBAR oscillator, tuned with a switched-capacitor array, provides 5800ppm of frequency tuning, sufficient to cover a wide range of manufacturing and temperature variations of an FBAR. An all-digital phase-locked loop (AD...
متن کامل